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PD -91884
SMPS MOSFET
IRFP450A
HEXFET(R) Power MOSFET
Applications l Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss Specified ( See AN 1001)
l
VDSS
500V
Rds(on) max
0.40
ID
14A
TO-247AC
G DS
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw
Max.
14 8.7 56 190 1.5 30 4.1 -55 to + 150 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V V/ns C
Typical SMPS Topologies:
l l l
Two Transistor Forward Half Bridge, Full Bridge PFC Boost
through are on page 8
Notes
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1
6/23/99
IRFP450A
Static @ TJ = 25C (unless otherwise specified)
Parameter Min. Drain-to-Source Breakdown Voltage 500 V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient --- RDS(on) Static Drain-to-Source On-Resistance --- VGS(th) Gate Threshold Voltage 2.0 --- IDSS Drain-to-Source Leakage Current --- Gate-to-Source Forward Leakage --- IGSS Gate-to-Source Reverse Leakage --- V(BR)DSS Typ. --- 0.58 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.40 VGS = 10V, ID = 8.4A 4.0 V VDS = VGS, ID = 250A 25 VDS = 500V, VGS = 0V A 250 VDS = 400V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 7.8 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 15 36 35 29 2038 307 10 2859 81 96 Max. Units Conditions --- S VDS = 50V, ID = 8.4A 64 ID = 14A 16 nC VDS = 400V 26 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 14A ns --- RG = 6.2 --- RD = 17,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
760 14 19
Units
mJ A mJ
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24
Max.
0.65 --- 40
Units
C/W
Diode Characteristics
IS
I SM
VSD trr Q rr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 14 --- --- showing the A G integral reverse --- --- 56 S p-n junction diode. --- --- 1.4 V TJ = 25C, IS = 14A, VGS = 0V --- 487 731 ns TJ = 25C, IF = 14A --- 3.9 5.8 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFP450A
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
10
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
1
4.5V
1
4.5V
0.1
0.01 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
R DS(on) , Drain-to-Source On Resistance (Normalized)
14A ID = 13A
I D , Drain-to-Source Current (A)
TJ = 150 C
10
2.5
2.0
TJ = 25 C
1
1.5
1.0
0.5
0.1 4.0
V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFP450A
100000
10000
VGS , Gate-to-Source Voltage (V)
V GS = C is s = C rs s = C oss =
0V, f = 1MHz Cg s + C g d , Cd s SHORTE D C gd C ds + C gd
20
ID = 14A 13A
16
VDS = 400V VDS = 250V VDS = 100V
C , Capacitance (pF)
C iss
1000
12
C oss
100
8
10
C rss
4
1 1 10 100 1000
A
0 0 15 30
FOR TEST CIRCUIT SEE FIGURE 13
45 60 75
V D S , D ra in-to-S ource V oltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED BY RDS(on)
ISD , Reverse Drain Current (A)
10
I D , Drain Current (A)
TJ = 150 C
10us
TJ = 25 C
1
10
100us
1ms
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4 1
TC = 25 C TJ = 150 C Single Pulse
10 100
10ms 1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFP450A
14
VDS
12
RD
VGS RG
D.U.T.
+
I D , Drain Current (A)
10
-VDD
8
10V
Pulse Width 1 s Duty Factor 0.1 %
6
4
Fig 10a. Switching Time Test Circuit
VDS 90%
2
0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01
0.01
SINGLE PULSE (THERMAL RESPONSE)
P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC
0.001 0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFP450A
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
1600
TOP BOTTOM
VDS
L
D R IV E R
ID 6.3A 8.9A 14A
1200
RG
20V tp
D .U .T
IA S
+ V - DD
A
800
0 .0 1
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS tp
400
0 25 50 75 100 125 150
Starting T , Junction Temperature( C) J
IAS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
V D S a v , A valanc he V oltage (V )
640
620
Charge
600
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
580
50K 12V .2F .3F
560
D.U.T. VGS
3mA
+ V - DS
540 0 2 4 6 8 10 12 14
A
I a v , A v alanc he C urrent (A )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current
6
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IRFP450A
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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7
IRFP450A
Package Outline
TO-247AC Outline Dimensions are shown in millimeters (inches)
1 5.9 0 (.6 26 ) 1 5.3 0 (.6 02 ) -B3.6 5 (.14 3) 3.5 5 (.14 0) 0.2 5 (.0 10 ) M -A5 .50 (.21 7) 2 0 .30 (.80 0) 1 9 .70 (.77 5) 1 2 3 -C14.8 0 (.5 83 ) 14.2 0 (.5 59 ) 4 .30 (.1 70 ) 3 .70 (.1 45 )
LE AD A S SIG N ME NTS 1 2 3 4 G ATE DR A IN SO UR C E DR A IN
-DDBM 5 .30 (.20 9) 4 .70 (.18 5) 2 .50 (.0 89 ) 1 .50 (.0 59 ) 4
2X
5.50 (.2 1 7) 4.50 (.1 7 7)
NO TE S: 1 DIM EN SION ING & TO LER AN CING P ER A N SI Y14.5M , 1982. 2 CON TR OLLIN G D IM EN SIO N : IN CH . 3 CON F OR M S TO JED E C OU TLIN E TO-247-A C .
2 .40 (.0 94 ) 2 .00 (.0 79 ) 2X 5.45 (.2 1 5) 2X
1 .4 0 (.0 56 ) 3 X 1 .0 0 (.0 39 ) 0.2 5 (.01 0) M 3 .40 (.1 33 ) 3 .00 (.1 18 ) C AS
0 .8 0 (.0 31 ) 3X 0 .4 0 (.0 16 ) 2.60 (.10 2) 2.20 (.08 7)
Part Marking Information
TO-247AC
E X A MP LE : T H IS IS A N IR F P E 30 W ITH A S S E MB L Y LO T C O D E 3 A 1 Q
A
IN TE R N A TIO N A L R E C T IF IE R LOG O A S S E MB L Y LOT CO DE
P A R T N U MB E R IR FP E 30 3 A 1 Q 9 3 02 D A TE C O D E (Y YW W ) YY = Y E A R W W W EEK
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Starting TJ = 25C, L =7.8mH
RG = 25, IAS = 14A. (See Figure 12)
ISD 14A, di/dt 130A/s, VDD V(BR)DSS,
TJ 150C
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8
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